发明名称 |
ELECTRONIC SYSTEM AND METHOD FOR SELECTIVELY ALLOWING ACCESS TO A SHARED MEMORY |
摘要 |
An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image. |
申请公布号 |
US2014176587(A1) |
申请公布日期 |
2014.06.26 |
申请号 |
US201414195414 |
申请日期 |
2014.03.03 |
申请人 |
STMicroelectronics, Inc |
发明人 |
Owen Jefferson Eugene;Diaz Raul Zegers;Colavin Osvaldo |
分类号 |
G06T1/60;G06F15/167;G06F13/18 |
主分类号 |
G06T1/60 |
代理机构 |
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代理人 |
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主权项 |
1. A computing device method, comprising:
configuring a main memory bus to pass data at a rate sufficient to operate at least two devices without either of the at least two devices starving for lack of data; generating first main memory requests with a first processing unit; passing the first main memory requests to a shared main memory through a first main memory interface and over the main memory bus; generating second main memory requests with a decoder/encoder; passing the second main memory requests to the shared main memory through a second main memory interface and over the main memory bus; receiving the first and second main memory requests from the first processing unit and the decoder/encoder respectively with an arbiter; arbitrating access to the shared main memory with the arbiter retrieving software instructions from the shared main memory, the software instructions passed over the main memory bus in real time; executing the software instructions with the first processing unit; passing, in real time, video data between the decoder/encoder and the shared main memory over the main memory bus; and operating the decoder/encoder on the video data. |
地址 |
Coppell TX US |