发明名称 |
Apparatus and Method For High Voltage I/O Electro-Static Discharge Protection |
摘要 |
An electronics chip includes a charge pump and at least one high voltage (HV) electro-static discharge (ESD) module. The charge pump is configured to provide a predetermined voltage across a microphone. The devices described herein are implemented in a standard low voltage CMOS process and has a circuit topology that provides an inherent ESD protection level (when it is powered down), which is higher than the operational (predetermined) DC level. At least one high voltage (HV) electro-static discharge (ESD) module is coupled to the output of the charge pump. The HV ESD module is configured to provide ESD protection for the charge pump and a microelectromechanical system (MEMS) microphone that is coupled to the chip. The at least one HV ESD module includes a plurality of PMOS or NMOS transistors having at least one high voltage NWELL/DNWELL region formed within selected ones of the PMOS or NMOS transistors. The at least one high voltage NWELL/DNWELL region has a breakdown voltage sufficient to allow a low voltage process to be used to construct the chip and still allow the HV ESD module to provide ESD protection for the chip. |
申请公布号 |
US2014177113(A1) |
申请公布日期 |
2014.06.26 |
申请号 |
US201314132512 |
申请日期 |
2013.12.18 |
申请人 |
Knowles Electronics, LLC |
发明人 |
Gueorguiev Svetoslav Radoslavov;Furst Claus Erdmann;Joergensen Tore Sejr |
分类号 |
H02H9/04 |
主分类号 |
H02H9/04 |
代理机构 |
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代理人 |
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主权项 |
1. An electronics chip, the chip comprising:
a charge pump, the charge pump configured to provide a predetermined voltage across a microphone, the charge pump being implemented in a low voltage CMOS process; at least one high voltage (HV) electro-static discharge (ESD) module coupled to the output of the charge pump, the HV ESD module configured to provide ESD protection for the charge pump and a microelectromechanical system (MEMS) microphone that is coupled to the chip; wherein the at least one HV ESD module includes a plurality of PMOS or NMOS transistors having at least one high voltage NWELL/DNWELL region formed within selected ones of the PMOS or NMOS transistors, the at least one high voltage NWELL/DNWELL region having a breakdown voltage sufficient to allow a low voltage process to be used to construct the chip and still allow the HV ESD module to provide ESD protection for the chip. |
地址 |
Itasca IL US |