Computation Memory Operations in a Logic Layer of a Stacked Memory

摘要

Some die-stacked memories will contain a logic layer in addition to one or more layers of DRAM (or other memory technology). This logic layer may be a discrete logic die or logic on a silicon interposer associated with a stack of memory dies. Additional circuitry/functionality is placed on the logic layer to implement functionality to perform various computation operations. This functionality would be desired where performing the operations locally near the memory devices would allow increased performance and/or power efficiency by avoiding transmission of data across the interface to the host processor.

主权项

1. A method, comprising:
receiving, by a logic chip, a computation instruction from a processor, wherein the computation instruction includes a memory access instruction and one or more multiple descriptors; decoding, by the logic chip, the computation instruction to identify one or more data elements in a memory chip, the decoding being based on the one or more multiple descriptors; accessing the one or more data elements based on the memory access instruction; and; performing, by the logic chip, one or more computation operations on the one or more data elements.