发明名称 Controlling Configurable Peak Performance Limits Of A Processor
摘要 In one embodiment, the present invention includes a processor having a plurality of cores each to execute instructions, a non-volatile storage to store maximum peak operating frequency values each a function of a given number of active cores, a configuration storage to store frequency limits each corresponding to one of the maximum peak operating frequency values or a configurable clip frequency value less than the maximum peak operating frequency value. In turn, a power controller is configured to limit operating frequency of the cores to a corresponding frequency limit obtained from the configuration storage. Other embodiments are described and claimed.
申请公布号 US2014181538(A1) 申请公布日期 2014.06.26
申请号 US201213724732 申请日期 2012.12.21
申请人 Shrall Jeremy J.;Gunther Stephen H.;Sistla Krishnakanth V.;Wells Ryan D.;Conrad Shaun M. 发明人 Shrall Jeremy J.;Gunther Stephen H.;Sistla Krishnakanth V.;Wells Ryan D.;Conrad Shaun M.
分类号 G06F1/26 主分类号 G06F1/26
代理机构 代理人
主权项 1. A processor comprising: a core domain including a plurality of cores each to execute instructions; at least one other domain including at least one engine to execute instructions; a non-volatile storage to store a plurality of maximum peak operating parameter values for an operating parameter, each of the maximum peak operating parameter values a function of a number of active cores of the core domain and the at least one engine of the at least one other domain; a configuration storage to store a plurality of parameter limits, each of the parameter limits corresponding to one of the maximum peak operating parameter values or a configurable clip parameter value less than the maximum peak operating parameter value to place a limit on an operating parameter; and a power controller to place the limit on the operating parameter of at least one of the core domain and the at least one other domain to a corresponding parameter limit obtained from the configuration storage.
地址 Portland OR US