Method And Apparatus To Implement Lazy Flush In A Virtually Tagged Cache Memory

摘要

A processor includes a processor core including an execution unit to execute instructions, and a cache memory. The cache memory includes a controller to update each of a plurality of stale indicators in response to a lazy flush instruction. Each stale indicator is associated with respective data, and each updated stale indicator is to indicate that the respective data is stale. The cache memory also includes a plurality of cache lines. Each cache line is to store corresponding data and a foreground tag that includes a respective virtual address associated with the corresponding data, and that includes the associated stale indicator. Other embodiments are described as claimed.

主权项

1. A processor comprising:
a processor core including an execution unit to execute instructions; and a cache memory including:
a controller to update each of a plurality of stale indicators in response to a lazy flush instruction, each stale indicator associated with respective data, wherein each updated stale indicator is to indicate that the respective data is stale; anda plurality of cache lines, each cache line to store corresponding data, and a foreground tag that includes a respective virtual address associated with the corresponding data, and that includes the associated stale indicator.