| 发明名称 |
VARIABLE-WIDTH COMMAND/ADDRESS BUS |
| 摘要 |
Embodiments of the invention relate to a variable-width command/address bus (CA bus). In one embodiment, a memory controller includes first logic to determine whether a memory device is in a first mode or a second mode. The memory controller includes second logic to transmit a command to the memory device with a command/address bus having a first width over a first number of clock edges when the memory device is in the first mode, and with the command/address bus having a second width over a second number of clock edges when the memory device is in the second mode. |
| 申请公布号 |
US2014181333(A1) |
申请公布日期 |
2014.06.26 |
| 申请号 |
US201213722666 |
申请日期 |
2012.12.20 |
| 申请人 |
Bains Kuljit S. |
发明人 |
Bains Kuljit S. |
| 分类号 |
G06F3/06 |
主分类号 |
G06F3/06 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A memory controller comprising:
first logic to determine whether a memory device is in a first mode or a second mode; and second logic to transmit a command to the memory device with a command/address bus having a first width over a first number of clock edges when the memory device is in the first mode, and with the command/address bus having a second width over a second number of clock edges when the memory device is in the second mode. |
| 地址 |
Olympia WA US |
