发明名称 ABSORBING EXCESS UNDER-FILL FLOW WITH A SOLDER TRENCH
摘要 One embodiment sets forth an integrated circuit package that includes a substrate, one or more devices mounted on the substrate, a layer of under-fill configured to secure the one or more devices on the substrate, and a solder trench formed in the substrate, where the aggregate volume of the solder trench is large enough to capture a flow of excess under-fill during fabrication. One advantage of the disclosed integrated circuit package is that the solder trench is used in lieu of solder dam structures, thereby allowing a stencil to be lowered closer to the substrate surface during fabrication, which facilitates depositing solder paste during fabrication.
申请公布号 US2014175681(A1) 申请公布日期 2014.06.26
申请号 US201213722603 申请日期 2012.12.20
申请人 NAVIDIA CORPORATION 发明人 ZHANG Leilei;Boja Ron;Yee Abraham F.;BOKHAREY Zuhair
分类号 H01L23/31 主分类号 H01L23/31
代理机构 代理人
主权项 1. An integrated circuit package, comprising: a substrate; one or more devices mounted on the substrate; one or more electrical connections disposed between the substrate and the one or more devices; a layer of under-fill configured to secure the one or more devices on the substrate; and a solder trench formed in the substrate, wherein the aggregate volume of the solder trench is large enough to capture a flow of excess under-fill during fabrication.
地址 SANTA CLARA CA US