发明名称 SIGNAL PROCESSING DEVICE AND SIGNAL PROCESSING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide a signal processing device without complicated wiring, requiring neither data multiplexing processing nor additional preparation of a data bus line.SOLUTION: An FPGA 11A physically connects one sub-channel other than a first channel of a first input/output terminal 13A to another channel adjacent to a channel corresponding to the sub-channel of a second input/output terminal 14A. For example, the FPGA 11A connects a second channel of the first input/output terminal 13A to a first channel of the second input/output terminal 14A, connects a third channel of the first input/output terminal 13A to a second channel of the second input/output terminal 14A, connects a fourth channel of the first input/output terminal 13A to a third channel of the second input/output terminal 14A, and connects a fifth channel of the first input/output terminal 13A to a fourth channel of the second input/output terminal 14A.
申请公布号 JP2014116931(A) 申请公布日期 2014.06.26
申请号 JP20130233693 申请日期 2013.11.12
申请人 YAMAHA CORP 发明人 SATO KOICHIRO
分类号 H04M1/60;H04B3/02;H04R1/40;H04R3/00;H04R3/02 主分类号 H04M1/60
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