发明名称 WAY PREPARATION FOR ACCESSING A CACHE
摘要 For a memory access at a processor, only a subset (less than all) of the ways of a cache associated with a memory address is prepared for access. The subset of ways is selected based on stored information indicating, for each memory access, which corresponding way of the cache was accessed. The subset of ways is selected and preparation of the subset of ways is initiated prior to the final determination as to which individual cache way in the subset is to be accessed.
申请公布号 US2014181407(A1) 申请公布日期 2014.06.26
申请号 US201213726825 申请日期 2012.12.26
申请人 ADVANCED MICRO DEVICES, INC. 发明人 Crum Matthew M.;Tan Teik-Chung
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项 1. A method of accessing a cache comprising a plurality of ways, the method comprising: storing access information for a first memory access indicating a subset of the plurality of ways, one of the subset accessed by the first memory access; in response to a second memory access to the plurality of ways: determining the subset of the plurality of ways based on the access information; andpreparing the subset of the plurality of ways for access concurrent with determining a memory address based on the second memory access.
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