GATE SHIFT REGISTER AND DISPLAY DEVICE USING THE SAME

摘要

A gate shift register according to the present invention includes a plurality of stages receiving a plurality of gate shift clocks whose phases are sequentially shifted and generating gate output signals two by two. Each of the stages dependently connected to each other, comprises: a first Q node being charged to a high level according to a first start signal and being discharged to a low level according to a reset signal; a second Q node being charged to a high level according to a second start signal and being discharged to a low level to the reset signal; a Q-bar node being discharged to a low level according to the first start signal and being charged to a high level according to the reset signal; a first pull-up switch switching current flow between an input end of an N^th clock among the gate shift clocks and a first output node according to a potential of the first Q node; a second pull-up switch switching current flow between an input end of an (N+1)^th clock among the gate shift clocks and a second output node according to a potential of the second Q node; a first pull-down switch switching current flow between an input end of low level voltage and the first output node according to a potential of the Q-bar node; and a second pull-down switch switching current flow between an input end of low level voltage and the second output node according to a potential of the Q-bar node, wherein the reset signal is selected as an (N+3)^th clock among the gate shift clocks.