发明名称
摘要 In a nonvolatile memory, less than a full block may be erased as one or more pages. A select voltage is applied through pass transistors to each of plural selected wordlines and an unselect voltage is applied through pass transistor to each of plural unselected wordlines of a selected block. A substrate voltage is applied to the substrate of the selected block. A common select voltage may be applied to each selected wordline and the common unselect voltage may be applied to each unselected wordline. Select and unselect voltages may be applied to any of the wordlines of a select block. A page erase verify operation may be applied to a block having plural erased pages and plural nonerased pages.
申请公布号 JP5528798(B2) 申请公布日期 2014.06.25
申请号 JP20090501796 申请日期 2007.03.26
申请人 发明人
分类号 G11C16/06;G11C16/02;G11C16/04 主分类号 G11C16/06
代理机构 代理人
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