摘要 |
<p>A method (600) of processing a silicon wafer (100, 150; 200, 250) is disclosed. The method (600) comprises providing a flash memory region (101, 151; 201, 251) in the silicon wafer (100, 150; 200, 250) and providing a bipolar transistor (158, 160; 258, 260) with a polysilicon external base in the silicon wafer (100, 150; 200, 250). Providing the flash memory region (101, 151; 201, 251) and providing the bipolar transistor (158, 160; 258, 260) comprises a step of depositing a single polysilicon layer common to both the flash memory region (101, 151; 201, 251) and the bipolar transistor (158, 160; 258, 260).</p> |
申请人 |
NXP B.V. |
发明人 |
GRIDELET,, EVELYNE;MERTENS,, HANS;VAN DUUREN,, MICHIEL JOS;VANHOUCKE,, TONY;DINH,, VIET THANH |