发明名称 Microprocessor providing isolated timers and counters for execution of secure code
摘要 An apparatus providing for a secure execution environment is presented. The apparatus includes a microprocessor and a secure non-volatile memory. The a microprocessor is configured to execute non-secure application programs and a secure application program, where the non-secure application programs are accessed from a system memory via a system bus. The microprocessor has a plurality of timers which are visible and accessible only by the secure application program when executing in a secure execution mode. The secure non-volatile memory is coupled to the microprocessor via a private bus and is configured to store the secure application program in encrypted form. Transactions over the private bus between the microprocessor and the secure non-volatile memory are isolated from the system bus, the system memory, and corresponding system bus resources within the microprocessor.
申请公布号 US8762687(B2) 申请公布日期 2014.06.24
申请号 US200812263206 申请日期 2008.10.31
申请人 Via Technologies, Inc. 发明人 Henry G. Glenn;Parks Terry
分类号 G06F9/30 主分类号 G06F9/30
代理机构 代理人 Huffman Richard K.;Huffman James W.
主权项 1. An apparatus providing for a secure execution environment, comprising: an x86-compatible microprocessor, capable of executing all of the instructions in the x86 instruction set, and configured to execute non-secure application programs and a secure application program, wherein said non-secure application programs are accessed from a system memory via a system bus, and wherein said x86-compatible microprocessor is also configured to automatically transition to a degraded mode where BIOS instructions are allowed to execute in order to allow for user input and the display of messages, but the execution of more complicated software such as an operating system is not allowed, said x86-compatible microprocessor comprising: a cryptographic unit, configured to encrypt said secure application program according to a symmetric key algorithm using a processor unique cryptographic key, wherein said processor unique cryptographic key can only be read by said cryptographic unit; anda plurality of timers which are visible and accessible only by said secure application program when executing in a secure execution mode; and a secure non-volatile memory, coupled to said x86-compatible microprocessor via a private bus, configured to store said secure application program in encrypted form, wherein transactions over said private bus between said x86-compatible microprocessor and said secure non-volatile memory are isolated from said system bus, said system memory, and corresponding system bus resources within said x86-compatible microprocessor.
地址 New Taipei TW