发明名称 Semiconductor device
摘要 On the top surface of a thin semiconductor wafer, top surface structures forming a semiconductor chip are formed. The top surface of the wafer is affixed to a supporting substrate with a double-sided adhesive tape. Then, from the bottom surface of the thin semiconductor wafer, a trench, which becomes a scribing line, is formed by wet anisotropic etching so that side walls of the trench are exposed. On the side walls of the trench with the crystal face exposed, an isolation layer with a conductivity type different from that of the semiconductor wafer for holding a reverse breakdown voltage is formed simultaneously with a collector region of the bottom surface diffused layer by ion implantation, followed by annealing with laser irradiation. The side walls form a substantially V-shaped or trapezoidal-shaped cross section, with an angle of the side wall relative to the supporting substrate being 30-70°. The double-sided adhesive tape is then removed from the top surface to produce semiconductor chips. With such a manufacturing method, a reverse-blocking semiconductor device having high reliability can be formed.
申请公布号 US8759870(B2) 申请公布日期 2014.06.24
申请号 US201012824541 申请日期 2010.06.28
申请人 Fuji Electric Co., Ltd. 发明人 Nakazawa Haruo;Shimoyama Kazuo;Takei Manabu
分类号 H01L29/739;H01L29/06 主分类号 H01L29/739
代理机构 Rossi, Kimms & McDowell, LLP 代理人 Rossi, Kimms & McDowell, LLP
主权项 1. A semiconductor device comprising: a first conductivity type substrate with a first principle surface on which an active device is formed and a second principle surface with a collector diffused layer on the second principle surface; a trench in the second principle surface; a second conductivity type doped semiconductor layer on the trench; and a second conductivity type layer on the second principle surface, the second conductivity type layer being coupled to the second conductivity type doped semiconductor layer, wherein the trench has a substantially trapezoidal-shaped cross section and has side walls that extend from the second principle surface at an incline, the side walls defining the outer circumferential edge of the semiconductor device, wherein the angle of inclination of the side walls relative to the first principle surface is at least 30° but not greater than 70°.
地址 JP