发明名称 Low power state for DSL system and devices
摘要 Described herein are systems, apparatuses, and methods relating to a power-saving state or power-saving mode to facilitate clock synchronization between the two transceiver units and/or updating of DSL operation parameters during the power-saving state.
申请公布号 US8761284(B2) 申请公布日期 2014.06.24
申请号 US201213685697 申请日期 2012.11.26
申请人 Lantiq Deutschland GmbH 发明人 Zukunft Roland;Frenzel Rudi
分类号 H04K1/10;H04L27/28 主分类号 H04K1/10
代理机构 SpryIP, LLC 代理人 SpryIP, LLC
主权项 1. A device, comprising: a controller to set a receiver in a power-saving state having a set spectral transmission power density, wherein the controller is configured to identify in the power-saving state first time intervals during which first signals are received by the receiver from a communication channel and to identify in the power-saving state second time intervals, which are between successive ones of the first time intervals during which no signals are received by the receiver from the communication channel.
地址 Neubiberg DE