发明名称 Chip-on-lead package and method of forming
摘要 In one embodiment, a chip-on-lead package structures includes an electronic chip having opposing major surfaces. One major surface of the electronic chip is attached to first and second leads. The one major surface is electrically connected to the first lead, and electrically isolated from the second lead. The other major surface where active device are formed may be electrically connected to the second lead.
申请公布号 US8759978(B2) 申请公布日期 2014.06.24
申请号 US201213354752 申请日期 2012.01.20
申请人 Semiconductor Components Industries, LLC 发明人 Prajuckamol Atapol;Fon Bih Wen;Lee Jun Keat
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人 Jackson Kevin B.
主权项 1. An electronic device structure comprising: an electronic device having first and second opposing major surfaces; a plurality of conductive pads on the first major surface; an insulative layer adjacent a portion of the second major surface; at least one conductive structure adjacent another portion of the second major surface and electrically coupled to the second major surface; a plurality of first conductive leads coupled to the insulative layer so that the electronic device overlaps the plurality of first conductive leads in a chip-on-lead configuration, where at least some of the plurality of first conductive leads are coupled to at least a portion of plurality of conductive pads; and a second conductive lead coupled to the at least one conductive structure.
地址 Phoenix AZ US