发明名称 Apparatus for mixed signal interface acquisition circuitry and associated methods
摘要 An integrated circuit (IC) includes a plurality of pads adapted to communicate signals with a circuit external to the IC, and a first mixed signal interface block coupled to a first pad in the plurality of pads, where the first mixed signal interface block is adapted to receive a first trigger signal from the circuit external to the IC and to provide a second trigger signal. The IC further includes a second mixed signal interface block coupled to a second pad in the plurality of pads, where the second mixed signal interface block is adapted to receive and track a first input signal from the circuit external to the IC in a first mode of operation of the IC. The second mixed signal interface block is further adapted to generate, in response to the second trigger signal, a first output signal based on the first input signal and to provide the first output signal to a digital core of the IC in a second mode of operation of the IC, where the power consumption of the IC is lower in the first mode of operation than in the second mode of operation.
申请公布号 US8762586(B2) 申请公布日期 2014.06.24
申请号 US201313799159 申请日期 2013.03.13
申请人 Silicon Laboratories Inc. 发明人 Daigle Clayton;Xiao Jinwen;Thomsen Axel;Roy Subrata;Wang Xiaodong
分类号 G06F3/00;G06F13/00 主分类号 G06F3/00
代理机构 Law Offices of Maximilian R. Peterson 代理人 Law Offices of Maximilian R. Peterson
主权项 1. An integrated circuit (IC), comprising: a plurality of pads adapted to communicate signals with a circuit external to the IC; a first mixed signal interface block coupled to a first pad in the plurality of pads, the first mixed signal interface block adapted to receive a first trigger signal from the circuit external to the IC and to provide a second trigger signal; and a second mixed signal interface block coupled to a second pad in the plurality of pads, the second mixed signal interface block adapted to receive and track a first input signal from the circuit external to the IC in a first mode of operation of the IC, and to generate, in response to the second trigger signal, a first output signal based on the first input signal and to provide the first output signal to a digital core of the IC in a second mode of operation of the IC, wherein a power consumption of the IC is lower in the first mode of operation than in the second mode of operation.
地址 Austin TX US