发明名称 Writing bit alterable memories
摘要 A bit alterable memory may include current generators in a periphery outside the main memory core. Current may be generated in the periphery and driven into the core. As a result, the capacitance of the memory cells has a lowered effect. The current may be generated using the chip supply voltage and then mirrored using a pump voltage. In some embodiments, the mirroring may be ratioed at the partition level and multiplied at the plane level. A delay may be provided before applying the currents to the cell to accommodate for transients.
申请公布号 US8760938(B2) 申请公布日期 2014.06.24
申请号 US200711906722 申请日期 2007.10.03
申请人 Intel Corporation 发明人 Bedeschi Ferdinando;Resta Claudio;Fackenthal Richard;Zhang Ruili
分类号 G11C7/00 主分类号 G11C7/00
代理机构 Trop, Pruner & Hu, P.C. 代理人 Trop, Pruner & Hu, P.C.
主权项 1. A method comprising: generating current in a periphery outside a memory core of a bit alterable memory using an unboosted memory supply voltage of the memory; and driving the current from the periphery into the core.
地址 Santa Clara CA US