| 发明名称 | Graphics processing architecture employing a unified shader | ||
| 摘要 | A graphics processing architecture in one example performs vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data b a processor unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continues pixel calculation operations that are to be or are currently being performed the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available. | ||
| 申请公布号 | US8760454(B2) | 申请公布日期 | 2014.06.24 |
| 申请号 | US201113109738 | 申请日期 | 2011.05.17 |
| 申请人 | ATI Technologies ULC | 发明人 | Morein Stephen L.;Lefebvre Laurent;Gruber Andrew E.;Skende Andi |
| 分类号 | G06F15/00 | 主分类号 | G06F15/00 |
| 代理机构 | Faegre Baker Daniels LLP | 代理人 | Faegre Baker Daniels LLP |
| 主权项 | 1. A method carried out by a unified shader comprising: performing vertex manipulation operations and pixel manipulation operations by transmitting vertex data to a general purpose register block, and performing vertex operations on the vertex data by a processor within the unified shader unless the general purpose register block does not have enough available space therein to store incoming vertex data; and continuing pixel calculation operations that are to be or are currently being performed by the processor based on instructions maintained in an instruction store until enough registers within the general purpose register block become available. | ||
| 地址 | Markham, Ontario CA | ||