发明名称 TECHNIQUE FOR ACCESSING CONTENT-ADDRESSABLE MEMORY
摘要 A tag unit configured to manage a cache unit includes a coalescer that implements a set hashing function. The set hashing function maps a virtual address to a particular content-addressable memory unit (CAM). The coalescer implements the set hashing function by splitting the virtual address into upper, middle, and lower portions. The upper portion is further divided into even-indexed bits and odd-indexed bits. The even-indexed bits are reduced to a single bit using a XOR tree, and the odd-indexed are reduced in like fashion. Those single bits are combined with the middle portion of the virtual address to provide a CAM number that identifies a particular CAM. The identified CAM is queried to determine the presence of a tag portion of the virtual address, indicating a cache hit or cache miss.
申请公布号 US2014173193(A1) 申请公布日期 2014.06.19
申请号 US201213720755 申请日期 2012.12.19
申请人 NVIDIA CORPORATION 发明人 Fahs Brian;ANDERSON Eric T.;Barrow-Williams Nick;GADRE Shirish;MCCORMACK Joel James;NORDQUIST Bryon S.;Saxena Nirmal Raj;Shah Lacky V.
分类号 G06F17/30;G06F12/10 主分类号 G06F17/30
代理机构 代理人
主权项 1. A computer-implemented method for accessing a memory module within a plurality of memory modules, the method comprising: parsing a virtual address into a first portion, a second portion, and a third portion; parsing the first portion into even-indexed bits and odd-indexed bits, wherein each of the even-indexed bits has a different even-numbered index within the virtual address and each of the odd-indexed bits has a different odd-numbered index within the virtual address; reducing the even-indexed bits to a first bit; reducing the odd-indexed bits to a second bit; and generating a memory module number by combining the first bit and the second bit with the second portion, wherein the memory module number identifies the memory module within the plurality of memory modules.
地址 Santa Clara CA US