ANALYSIS OF CHIP-MEAN VARIATION AND INDEPENDENT INTRA-DIE VARIATION FOR CHIP YIELD DETERMINATION

摘要

Systems and methods for determining a chip yield are disclosed. One system includes a first level integration solver and a second level integration solver. The first level integration solver is configured to obtain a first probability distribution function modeling variations within a chip and to perform a discontinuous first level integration with the first probability distribution function. In addition, the second level integration solver is implemented by a hardware processor and is configured to perform a continuous second level integration based on a second probability distribution function modeling variations between dies to determine the chip yield.

主权项

1. A system for determining a chip yield comprising:
a first level integration solver configured to obtain a first probability distribution function modeling variations within a chip and to perform a discontinuous first level integration with the first probability distribution function; and a second level integration solver, implemented by a hardware processor, configured to perform a continuous second level integration based on a second probability distribution function modeling variations between dies to determine the chip yield.