发明名称 |
SILICON GERMANIUM AND GERMANIUM MULTIGATE AND NANOWIRE STRUCTURES FOR LOGIC AND MULTILEVEL MEMORY APPLICATIONS |
摘要 |
A method to provide a transistor or memory cell structure. The method comprises: providing a substrate including a lower Si substrate and an insulating layer on the substrate; providing a first projection extending above the insulating layer, the first projection including an Si material and a Sil-xGex material; and exposing the first projection to preferential oxidation to yield a second projection including a center region comprising Ge/Sil-yGey and a covering region comprising SiO2 and enclosing the center region. |
申请公布号 |
US2014170817(A1) |
申请公布日期 |
2014.06.19 |
申请号 |
US201414184999 |
申请日期 |
2014.02.20 |
申请人 |
Jin Been-Yih;Doyle Brian S.;Kavalieros Jack T.;Chau Robert S. |
发明人 |
Jin Been-Yih;Doyle Brian S.;Kavalieros Jack T.;Chau Robert S. |
分类号 |
H01L29/10;H01L29/66;H01L29/06 |
主分类号 |
H01L29/10 |
代理机构 |
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代理人 |
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主权项 |
1. A method to form a microelectronic structure comprising:
providing a substrate including a lower Si substrate and an insulating layer on the substrate; forming a projection on the substrate projecting above the insulating layer and including a center region comprising a floating nanowire channel comprising Ge/Sil-yGEy and a covering region enclosing the center region, wherein the covering region comprises an insulation covering surrounding the nanowire channel and electrically insulating the nanowire channel.
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地址 |
Lake Oswego OR US |