发明名称 Use Disposable Gate Cap to Form Transistors, and Split Gate Charge Trapping Memory Cells
摘要 A semiconductor device and method of making such device is presented herein. The method includes disposing a gate layer over a dielectric layer on a substrate and further disposing a cap layer over the gate layer. A first transistor gate is defined having an initial thickness substantially equal to a combined thickness of the cap layer and the gate layer. A first doped region is formed in the substrate adjacent to the first transistor gate. The cap layer is subsequently removed and a second transistor gate is defined having a thickness substantially equal to the thickness of the gate layer. Afterwards, a second doped region is formed in the substrate adjacent to the second transistor gate. The first doped region extends deeper in the substrate than the second doped region, and a final thickness of the first transistor gate is substantially equal to the thickness of the second transistor gate.
申请公布号 US2014167142(A1) 申请公布日期 2014.06.19
申请号 US201213715673 申请日期 2012.12.14
申请人 SPANSION LLC 发明人 Chen Chun;Ramsbey Mark;Fang Shenqing
分类号 H01L29/792;H01L29/66 主分类号 H01L29/792
代理机构 代理人
主权项 1. A method of fabricating a semiconductor device, comprising: disposing a gate layer over a dielectric on a substrate; disposing a cap layer over the gate layer; etching through the cap layer and the gate layer to define a first transistor gate having an initial thickness substantially equal to a combined thickness of the cap layer and the gate layer; forming a first doped region in the substrate adjacent to the first transistor gate; removing the cap layer; etching through the gate layer to define a second transistor gate having a thickness substantially equal to the thickness of the gate layer; and forming a second doped region in the substrate adjacent to the second transistor gate, wherein the first doped region extends deeper in the substrate than the second doped region, and a final thickness of the first transistor gate is substantially equal to the thickness of the second transistor gate.
地址 Sunnyvale CA US