SHIFT REGISTER UNIT, SHIFT REGISTER AND SCANNING METHOD THEREOF, AND DISPLAY DEVICE

摘要

A shift register unit, a shift register and the scanning method thereof, and a display device are disclosed. Bidirectional scanning can be achieved while the number of the switches used in the shift register could be reduced, and the spaces are saved. Furthermore, the problem of large coupled noise voltage is solved, and the performance of the shift register is improved. The circuit comprises: a second switch connected with a first switch; a fourth switch connected with a third switch; a fifth switch connected with a sixth switch; a first input and a eighth switch connected with a seventh switch; a output end and a ninth switch connected with the eighth switch; an eleventh, a twelfth, and a thirteenth switch connected with a tenth switch; a fourteenth switch connected with the thirteenth switch; a fifteenth switch connected with the fourteenth switch; a capacitor positioned between a first node and a second nodes.

主权项

1. A shift register unit, comprising:
a first switch, of which the gate electrode receives a signal inputted through a first input; a second switch, of which the source electrode is connected with the drain electrode of the first switch, and the gate electrode receives a signal inputted through a second input; a third switch, of which the drain electrode is connected with the source electrode of the first switch, the source electrode receives a high level signal, and the gate electrode receives a first forward DC signal; a fourth switch, of which the source electrode is connected with the source electrode of the third switch, and the gate electrode receives a second reverse DC signal; a fifth switch, of which the drain electrode is connected with the drain electrode of the third switch, the gate electrode receives a first reverse DC signal, and the source electrode receives a low level signal; a sixth switch, of which the source electrode is connected with the source electrode of the fifth switch, the drain electrode is connected both with drains of the second switch and the fourth switch, and the gate electrode receives a second forward DC signal; a seventh switch, of which the drain electrode receives the signal inputted through the first input, and the gate electrode receives the second reverse DC signal; an eighth switch, of which the gate electrode is connected with the source electrode of the seventh switch, the source electrode is connected with the source electrode of the first switch, and the drain electrode is connected with an output end; a ninth switch, of which the drain electrode is connected with the drain electrode of the eighth switch, the gate electrode is connected with the drain electrode of the first switch, and the source electrode receives a first clock signal; a tenth switch, of which the source electrode and the gate electrode both receive a second clock signal; an eleventh switch, of which the source electrode is connected with the drain electrode of the tenth switch, the gate electrode receives a control signal, and the drain electrode receives the low level signal; a twelfth switch, of which the gate electrode is connected with the drain electrode of the tenth switch, the drain electrode is connected with the source electrode of the second switch, and the source electrode receives the low level signal; a thirteenth switch, of which the gate electrode is connected with the drain electrode of the tenth switch, and the drain electrode receives the low level signal; a fourteenth switch, of which the source electrode is connected with the source electrode of the thirteenth switch and the output end, and the drain electrode is connected with the drain electrode of the sixth switch; a fifteenth switch, of which the source electrode is connected with the gate electrode of the fourteenth switch, the drain electrode receives the signal inputted through the second input, and the gate electrode receives the second forward DC signal; and a capacitor positioned between a first node and a second node, wherein the first node is connected to the drain of the first switch, and the second node is connected to the output end.