发明名称 DISPLAY DEVICE AND ELECTRONIC APPARATUS
摘要 <p>PROBLEM TO BE SOLVED: To prevent reduction in a gate potential of a pull-up transistor.SOLUTION: A first transistor included in a driving circuit has a first terminal electrically connected to second wiring, a second terminal electrically connected to first wiring, and a gate electrically connected to a second circuit and a first terminal of a third transistor. A second transistor has a first terminal electrically connected to the first wiring, a second terminal electrically connected to sixth wiring, and a gate electrically connected to a first circuit and a gate of the third transistor. The third transistor has a second terminal electrically connected to the sixth wiring. The first circuit is electrically connected to third wiring, fourth wiring, fifth wiring, and the sixth wiring. The second circuit is electrically connected to the first wiring, the second wiring, and the sixth wiring.</p>
申请公布号 JP2014112230(A) 申请公布日期 2014.06.19
申请号 JP20130263158 申请日期 2013.12.20
申请人 SEMICONDUCTOR ENERGY LAB CO LTD 发明人 UMEZAKI ATSUSHI
分类号 G09G3/20;G02F1/133;G02F1/1368;G09F9/30 主分类号 G09G3/20
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