发明名称 Block Memory Engine
摘要 In an embodiment, a processor is disclosed and includes a cache memory and a memory execution cluster coupled to the cache memory. The memory execution cluster includes a memory execution unit to execute instructions including non-block memory instructions, and block memory logic to execute one or more block memory operations. Other embodiments are described and claimed.
申请公布号 US2014173203(A1) 申请公布日期 2014.06.19
申请号 US201213717981 申请日期 2012.12.18
申请人 Forsyth Andrew T. 发明人 Forsyth Andrew T.
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
主权项 1. A processor comprising: a cache memory; and a memory execution cluster coupled to the cache memory, the memory execution cluster comprising: a memory execution unit to execute instructions including non-block memory instructions; andblock memory logic to execute one or more block memory operations.
地址 Kirkland WA US