SHIFT REGISTER, GATE DRIVER AND DISPLAY DEVICE

摘要

Disclosed are a shift register, a gate driver and a display device, which relate the field of display technology and may eliminate the voltage coupled noise generated by a clock signal at an output terminal of the shift register effectively. The shift register comprises: a first input unit, a clock control unit, a second input unit, an inverting unit, a pulling-down unit and a first level selecting unit, a second level selecting unit, a third level selecting unit; the first input unit is connected with a first input signal terminal, the first level selecting unit and the second input unit, respectively, wherein a node at which the first input unit is connected with the second input unit is a pulling-up node, the first input unit is used for controlling a potential at the pulling-up node. The embodiments of the present disclosure may be applied to various display devices.

主权项

1. A shift register, comprising: a first input unit, a clock control unit, a second input unit, an inverting unit, a pulling-down unit and a first level selecting unit, a second level selecting unit, a third level selecting unit; wherein
the first input unit is connected with a first input signal terminal, the first level selecting unit and the second input unit, respectively, wherein a node at which the first input unit is connected with the second input unit is a pulling-up node, the first input unit is used for controlling a potential at the pulling-up node; a first terminal of the clock control unit is connected with the pulling-up node, a second terminal thereof is connected with a clock signal terminal, and a third terminal thereof is connected with the pulling-down unit, wherein a node at which the third terminal of the clock control unit is connected with the pulling-down unit is an output terminal of the shift register, and the clock control unit is used for controlling whether to transmit a clock signal from the clock signal terminal to the output terminal of the shift register; the second input unit is connected with a second input signal terminal, the second level selecting unit, the pulling-up node, respectively, and is used for controlling the potential at the pulling-up node; the inverting unit is connected with the third level selecting unit, a low level signal terminal, the pulling-up node and the pulling-down unit, respectively, wherein a node at which the inverting unit is connected with the pulling-down unit is a pulling-down node, the inverting unit is used for making level of the voltage at the pulling-up node and level of the voltage at the pulling-down node be inverted to each other; the pulling-down unit is connected with the pulling-up node, the pulling-down node, the low level signal terminal, the first input signal terminal, the second input signal terminal and the output terminal of the shift register, respectively, and is used for pulling down the voltage at the output terminal of the shift register; the first level selecting unit is connected with the first input unit, and is used for selecting the low level signal terminal or a high level signal terminal to be connected to the first input unit; the second level selecting unit is connected with the second input unit, and is used for selecting the low level signal terminal or the high level signal terminal to be connected to the second input unit; the first level selecting unit and the second level selecting unit make the level of the signal terminal connected to the first input unit and the level of the signal terminal connected to the second input unit be inverted to each other; the third level selecting unit is connected with the inverting unit, and is used for selecting the low level signal terminal or the high level signal terminal to be connected to the inverting unit.