| 摘要 |
<p>Provided is a non-volatile memory circuit capable of preventing erroneous writing while maintaining write efficiency. A non-volatile memory transistor having a one-sided LOCOS offset structure is used as a non-volatile memory element, and two pairs of switch transistors connected in parallel to the non-volatile memory element are controlled so that the non-LOCOS offset side serves as a drain in writing and the LOCOS offset side serves as the drain in reading. In a steady state (a state in which power supply is turned on, but the writing or reading is not performed), no potential is applied between the source and the drain of the non-volatile memory element.</p> |
