Efficient pipeline parallelism using frame shared memory

摘要

A systems and methods are disclosed that provide an efficient parallel pipeline for data processing using a multi-core processor. Embodiments allocate a shared memory portion of the memory that is accessible from more than one context of execution and/or process a frame in a plurality of processing stages processed by a context of execution. In some embodiments, each of the plurality of processing stages may be bound to a processing core of the multi-core processor. In other embodiments include one or more processing stages with a point-to-point communication mechanism that operates in shared memory.

主权项

1. A computer system comprising:
a multi-core processor including a plurality of processing cores; and memory communicably coupled with the multi-core processor, wherein the memory stores a plurality of instructions that, when executed by the multi-core processor, cause the multi-core processor to:
allocate a shared memory portion of the memory, wherein the shared memory portion is accessible from kernel space and user space contexts of execution;process a frame in at least a first stage running in kernel space and a second stage running in user space; andassociate the first and second stages with a point-to-point communication mechanism that allows the first stage and the second stage to exchange data related to the frame through mutual access to the shared memory portion of the memory.