Apparatus and method for enhancing flash endurance by encoding data

摘要

Input bits are stored in memory cells by mapping the input bits into a larger number of transformed bits using a shaping encoding that has a downward asymptotic bias with respect to a mapping of bit patterns to cell states and programming some of the cells according to that mapping of bit patterns to cell states. The programmed cells are erased before being programmed to store any other bits. The invention sacrifices memory capacity to increase endurance.

主权项

1. A method of storing a first plurality of input bits in a plurality of memory cells, comprising:
(a) providing a first mapping of bit patterns to cell states of the memory cells; (b) mapping the first plurality of input bits to a first plurality of transformed bits that is larger in number than the first plurality of input bits, using a first shaping encoding that has a downward asymptotic bias with respect to the first mapping of bit patterns to cell states; (c) programming at least a portion of the first sub-plurality of the memory cells to store the first plurality of transformed bits according to the first mapping of bit patterns to cell states; and (d) erasing the at least portion of the first sub-plurality of the memory cells before programming the at least portion of the first sub-plurality of the memory cells to store any other bits.