发明名称 Method of detecting error in a semiconductor memory device
摘要 A semiconductor memory device and a memory system including the same are provided. The semiconductor memory device may include a first memory cell array block generating first data, a second memory cell array block generating second data, and first and second error detection code generators. The first error detection code generator may generate a first error detection code and may combine a portion of bits of the first error detection code with a portion of bits of a second error detection code to generate a first final error detection signal. The second error detection code generator may generate the second error detection code and may combine the remaining bits other than the portion of bits of the second error detection code with the remaining bits other than the portion of bits of the first error detection code to generate a second final error detection signal.
申请公布号 US8756475(B2) 申请公布日期 2014.06.17
申请号 US201112929250 申请日期 2011.01.11
申请人 Samsung Electronics Co., Ltd. 发明人 Chung Hoe-Ju;Kim Kyu-Hyoun
分类号 H03M13/00;H03M13/29;G06F11/08 主分类号 H03M13/00
代理机构 Harness, Dickey & Pierce, P.L.C. 代理人 Harness, Dickey & Pierce, P.L.C.
主权项 1. A method of detecting an error in a semiconductor memory device, the method comprising: outputting first data from a first memory cell array block; outputting second data from a second memory cell array block; generating a first error detection code for the first data; combining a portion of bits of the first error detection code with a portion of bits of a second error detection code to generate a first final error detection signal; generating the second error detection code for the second data; and combining remaining bits other than the portion of bits of the second error detection code with remaining bits other than the portion of bits of the first error detection code to generate a second final error detection signal.
地址 Gyeonggi-do KR