发明名称 |
Semiconductor memory device |
摘要 |
According to one embodiment, there is provided a semiconductor memory device including a memory cell array, a storage unit, a selection unit, a startup processing unit, and an operation control unit. The memory cell array includes memory cells. The storage unit stores a plurality of operating parameters. The selection unit accesses the storage unit and selects a first operating parameter for operating the memory cells from among the plurality of operating parameters stored in the storage unit, based on a first instruction input. The startup processing unit performs a power startup and reads out the first operating parameter from the storage unit and sets the first operating parameter so as to be ready for use, based on a second instruction input. The operation control unit uses the first operating parameter set by the startup processing unit in order to operate the memory cells. |
申请公布号 |
US8755230(B2) |
申请公布日期 |
2014.06.17 |
申请号 |
US201213358113 |
申请日期 |
2012.01.25 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Shinagawa Yuichi |
分类号 |
G11C11/34;G11C16/04 |
主分类号 |
G11C11/34 |
代理机构 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A semiconductor memory device, comprising:
a memory cell array which includes memory cells; a storage unit which stores a plurality of operating parameters; a selection unit which accesses the storage unit and selects a first operating parameter for operating the memory cells from among the plurality of operating parameters stored in the storage unit, based on a first instruction input; a startup processing unit which performs a power startup and reads out the first operating parameter from the storage unit and sets the first operating parameter so as to be ready for use, based on a second instruction input; and an operation control unit which uses the first operating parameter set by the startup processing unit in order to operate the memory cells.
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地址 |
Tokyo JP |