Writing method of nonvolatile semiconductor memory device

摘要

According to one embodiment, there is provided a writing method. The method includes setting potentials of a plurality of word lines to a first potential. The first potential is a potential to allow memory cells corresponding to a selective bit line to be in on state. The method also includes setting potentials of non-adjacent word lines to a second potential while maintaining potentials of adjacent word lines at a potential which allows the memory cells corresponding to the selective bit line to be in on state and setting a potential of a selective word line to a third potential. The second potential is a potential which is determined so as to allow the memory cells corresponding to the selective bit line to be in off state. The third potential is a potential where data is written in the selective memory cell corresponding to the selective bit line.

主权项

1. A writing method of a nonvolatile semiconductor memory device including a plurality of strings, a plurality of bit lines, and a plurality of word lines, in each of the plurality of strings a plurality of memory cells being connected in series, the plurality of bit lines being connected to the plurality of strings, and the plurality of word lines intersecting the plurality of strings to be connected to control gates of the memory cells, the method comprising:
setting potentials of the plurality of word lines to a first potential in a bit line potential setting state, the first potential being a potential to allow the memory cells corresponding to a selective bit line to be in on state, the selective bit line being a bit line corresponding to a selective memory cell among the plurality of bit lines, the bit line potential setting state being a state where a potential of the selective bit line is set to a selective potential and where a potential of a non-selective bit line is set to a non-selective potential; and setting potentials of non-adjacent word lines to a second potential while maintaining potentials of adjacent word lines at a potential which allows the memory cells corresponding to the selective bit line to be in on state and setting a potential of a selective word line to a third potential in the bit line potential setting state, the selective word line being a word line corresponding to the selective memory cell among the plurality of word lines, the adjacent word lines being word lines which are adjacent at both sides of the selective word line among the plurality of word lines, the non-adjacent word lines being word lines which are disposed outside the adjacent word lines among the plurality of word lines, the second potential being a potential which is determined so as to allow the memory cells corresponding to the selective bit line to be in off state, the third potential being a potential where data is written in the selective memory cell corresponding to the selective bit line.