发明名称 |
METHOD AND DEVICE FOR MRAM SMART BIT WRITING ALGORITHM BY ERROR CORRECTION PARITY BIT |
摘要 |
PROBLEM TO BE SOLVED: To provide MRAM smart bit writing algorithm by an error correction parity bit.SOLUTION: A method attempts to write an expected multibit word in a storage location of a memory. After the writing of a multibit word is attempted, an actual multibit word is read from the storage location. Then, the actual multibit word is compared with the expected multibit word, and a group of error bits and a group of correct bits saved in the storage location are identified. The group of correct bits is not re-written in the storage location, and the group of error bits is re-written in the storage location. |
申请公布号 |
JP2014110071(A) |
申请公布日期 |
2014.06.12 |
申请号 |
JP20130234140 |
申请日期 |
2013.11.12 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTUARING CO LTD |
发明人 |
CHIH YUE-DER;YU HUNG-CHANG;LIN KAI-CHUN;HUANG CHIN-YI;TRAN LAUN C |
分类号 |
G11C29/42;G06F12/16;G11C11/15 |
主分类号 |
G11C29/42 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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