发明名称 Power MOS Device Structure
摘要 Various embodiments of a power MOS device structure are disclosed. In one aspect, a power MOS device structure includes a plurality of LDMOS and a plurality of bonding pads. The basic units of LDMOS are coupled in parallel and electrically coupled to the bonding pads to couple to a gate terminal, a source terminal, a drain terminal and a substrate of each of the basic units of LDMOS. The basic units of LDMOS are disposed below the bonding pads. The bonding pads include a single layer of metal with a thickness of 3.5 um to 4.5 um and a width of 1.5 um to 2.5 um. The region below the bonding pads of the power MOS device of the present disclosure is utilized to increase the number of basic units of LDMOS, thereby effectively reducing the on-resistance.
申请公布号 US2014159151(A1) 申请公布日期 2014.06.12
申请号 US201314130483 申请日期 2013.05.07
申请人 CSMC Technologies Fab 1 Co., Ltd. 发明人 Zhang Shu;He Yanqiang;Lo TseHuang;Wu HsiaoChia
分类号 H01L29/78;H01L23/00 主分类号 H01L29/78
代理机构 代理人
主权项 1. A power MOS device structure, comprising: a plurality of basic units of lateral double-diffused metal-oxide semiconductor (LDMOS); and a plurality of bonding pads, wherein: the basic units of LDMOS are coupled in parallel and electrically coupled to the bonding pads to couple to a gate terminal, a source terminal, a drain terminal and a substrate of each of the basic units of LDMOS;the basic units of LDMOS are disposed below the bonding pads; andthe bonding pads include a single layer of metal with a thickness of 3.5 um to 4.5 um and a width of 1.5 um to 2.5 um.
地址 Wuxi, Jiangsu CN