发明名称 HIGHLY INTEGRATED MILLIMETER-WAVE SOC LAYOUT TECHNIQUES FOR IMPROVED PERFORMANCE AND MODELING ACCURACY
摘要 A capacitor integrated circuit can include a top metal layer, a bottom metal layer, and an intermediate metal layer. The top metal layer can store energy received from a transmission signal in an electric field. The top metal layer can include a first comb structure and a second comb structure, where the first comb structure can be interleaved with the second comb structure. The bottom metal layer can be positioned underneath the top metal layer and can provide a path to ground. The intermediate metal layer can be positioned over the bottom metal layer and underneath at least a portion of the top metal layer. The intermediate metal layer can provide a signal path for a supply voltage.
申请公布号 US2014162575(A1) 申请公布日期 2014.06.12
申请号 US201314099407 申请日期 2013.12.06
申请人 ANAYAS360.COM, LLC 发明人 Laskar Joy
分类号 H01L49/02;H04B1/40 主分类号 H01L49/02
代理机构 代理人
主权项 1. A capacitor integrated circuit, comprising: a top metal layer configured to store energy received from a transmission signal, the top metal layer comprising a first comb structure and a second comb structure, wherein the first comb structure is interleaved with the second comb structure to form a capacitor; a bottom metal layer positioned underneath the top metal layer, the bottom metal layer configured to provide a path to ground; and an intermediate metal layer positioned over the bottom metal layer and underneath at least a portion of the top metal layer, the intermediate metal layer configured to provide a signal path for a supply voltage.
地址 Sunnyvale CA US