发明名称 FINFET HYBRID FULL METAL GATE WITH BORDERLESS CONTACTS
摘要 A method for fabricating a field effect transistor device includes patterning a fin on substrate, patterning a gate stack over a portion of the fin and a portion of an insulator layer arranged on the substrate, forming a protective barrier over the gate stack, a portion of the fin and a portion of the insulator layer, the protective barrier enveloping the gate stack, depositing a second insulator layer over portions of the fin and the protective barrier, performing a first etching process to selectively remove portions of the second insulator layer to define cavities that expose portions of source and drain regions of the fin without appreciably removing the protective barrier, and depositing a conductive material in the cavities.
申请公布号 US2014162447(A1) 申请公布日期 2014.06.12
申请号 US201213709250 申请日期 2012.12.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION ;GLOBALFOUNDRIES, INC. ;RENESAS ELECTRONICS CORPORATION 发明人 Edge Lisa F.;Frank Martin M.;Haran Balasubramanian S.;Inada Atsuro;Kanakasabapathy Sivananda K.;Knorr Andreas;Narayanan Vijay;Paruchuri Vamsi K.;Seo Soon-cheon
分类号 H01L21/28 主分类号 H01L21/28
代理机构 代理人
主权项 1. A method for fabricating a field effect transistor device, the method comprising: patterning a fin on substrate; patterning a gate stack over a portion of the fin and a portion of an insulator layer arranged on the substrate, wherein the gate stack includes a dielectric layer disposed over a channel region of the fin; a silicon material layer selected from the group consisting of amorphous silicon and polysilicon disposed over and in contact with the dielectric layer; a TaAN or TiAlN barrier layer disposed over and in contact with the silicon material layer; and a low resistivity metal layer formed of tungsten disposed over and in contact with the barrier layer, wherein the tungsten metal layer has a sheet resistivity of about 11 to about 15 ohm/square at a thickness of about 125 Angstroms; forming a protective barrier over the gate stack, a portion of the fin and a portion of the insulator layer, the protective barrier enveloping the gate stack; depositing a second insulator layer over portions of the fin and the protective barrier; performing a first etching process to selectively remove portions of the second insulator layer to define cavities that expose portions of source and drain regions of the fin without appreciably removing the protective barrier; and depositing a conductive material in the cavities.
地址 Armonk NY US
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