PACKAGE METHOD FOR ELECTRONIC COMPONENTS BY THIN SUBSTRATE

摘要

Disclosed is a package method for electronic components by a thin substrate, including: providing a carrier; forming at least one metal layer and at least one dielectric layer on the carrier for manufacturing the thin substrate, and the thin substrate including at least one package unit for connecting at least one chip; forming at least one pad layer on a surface of the thin substrate; parting the thin substrate from the carrier; performing test to the thin substrate to weed out the package unit with defects in the at least one package unit and select the package units for connecting the chips; connecting the chips with the selected package units by flip chip bonding respectively. Accordingly, the yield of the entire package process can be improved and the pointless manufacture material cost can be reduced.

主权项

1. A package method for electronic components by a thin substrate, comprising:
providing a carrier; forming at least one metal layer and at least one dielectric layers on the carrier for manufacturing the thin substrate, and the thin substrate comprising at least one package unit for connecting at least one chip; forming at least one pad layer on a surface of the thin substrate; parting the thin substrate from the carrier; performing test to the thin substrate to weed out the package unit with defects in the at least one package unit and select the package units for connecting the chips; connecting the chips with the selected package units by flip chip bonding respectively; and performing an entire molding to the chips which are flip chip bonded on the thin substrate to build the electronic components.