发明名称 Output Queue Latency Behavior For Input Queue Based Device
摘要 In one implementation, an input queue switch provides latency fairness across multiple input ports and multiple output ports. In one embodiment, each input port maintains a virtual output queue for each associate output port. The virtual output queues across multiple inputs are aggregated for each specific output port. The sum of the lengths of the virtual output queues is compared to a threshold, and based on the comparison, feedback may be generated to control the operation of the input port for subsequent packets. The feedback may instruct the input port to stop buffering or drop packets destined for the output port with the sum of the lengths of the virtual output queues associated to the specific output port that exceeds the threshold. In another embodiment, each packet has an arrival timestamp, and a virtual output queue having the oldest timestamp is selected first to dequeue.
申请公布号 US2014161135(A1) 申请公布日期 2014.06.12
申请号 US201213708640 申请日期 2012.12.07
申请人 CISCO TECHNOLOGY, INC. 发明人 Acharya Dipankar Bhatt;Morandin Guglielmo;Pan Rong;Piglione Chiara;Suzuki Hiroshi
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
主权项 1. A method comprising: receiving a virtual output queue length value from each of a plurality of input ports coupled to an output port; calculating, by a controller, an aggregate queue length value for the output port as a sum of the virtual output queue length values from the plurality of input ports; and generating a feedback message for at least one of the plurality of input ports including the aggregate queue length value.
地址 San Jose CA US