摘要 |
<p>Provided is a method for manufacturing a dummy gate in a gate last process. The method comprises: providing a semiconductor substrate; growing a gate oxide layer on the semiconductor substrate; depositing a bottom-layer amorphous silicon on the gate oxide layer; depositing an oxide film/nitride film/oxide film (ONO) structure hard mask on the bottom-layer amorphous silicon; depositing a top-layer amorphous silicon on the ONO structure hard mask; depositing a hard mask layer on the top-layer amorphous silicon; forming a photoresist line with the width of 32 nm to 45 nm on the hard mask layer; and etching the hard mask layer, the top-layer amorphous silicon, the ONO structure hard mask and the bottom-layer amorphous silicon by using the photoresist line as a standard, and removing the photoresist line, the hard mask layer and the top-layer amorphous silicon. Correspondingly, also provided is a dummy gate in a gate last process. By means of the technical solutions of the present disclosure, the critical size and sectional profile of the gate can be precisely controlled, the roughness of the gate line can be effectively improved, and the performance and stability of the device can be ensured.</p> |
申请人 |
INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES |
发明人 |
LI, CHUNLONG;LI, JUNFENG;YAN, JIANG;ZHAO, CHAO |