发明名称 TEST METHOD FOR OPEN DEFECT AND SEMICONDUCTOR MEMORY DEVICE USING THE SAME
摘要 A semiconductor memory device includes: an input/output drive control unit which generates a drive control signal for driving a first and a second global input/output line in a first and a second test mode and an input control signal; a data input/output unit which drives the first global input/output line in response to input data upon a write operation in the first test mode, and drives the first and second global input/output lines in response to the drive control signal upon the write operation in the second test mode; and a data transmission unit which transmits data loaded on the first global input/output line to a first and a second local input/output line and stores the data in a memory cell array, upon the write operation in the first test mode, and transmits data loaded on the first and second global input/output lines to the first and second local input/output lines and stores the data in the memory cell array, upon the write operation in the second test mode.
申请公布号 KR20140071824(A) 申请公布日期 2014.06.12
申请号 KR20120139861 申请日期 2012.12.04
申请人 SK HYNIX INC. 发明人 LEE, SANG KWON
分类号 G11C29/00 主分类号 G11C29/00
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