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1. A semiconductor device, comprising:
a first conductivity type semiconductor substrate; a second conductivity type semiconductor region having a planar pattern enclosed by four rectangular linear sides and four corner curved sides on one main surface of the semiconductor substrate; a metal electrode forming Ohmic contact with the surface of the semiconductor region; a junction termination structure region including a plurality of second conductivity type guard rings enclosing an outer periphery of the semiconductor region on a one main surface side; and a low lifetime region of a depth within a predetermined distance range sandwiching a p-n junction of a bottom portion of the semiconductor region on the one main surface side and another semiconductor substrate main surface side of the p-n junction, separated from the one main surface side, wherein the low lifetime region includes a central region that has a portion coinciding with the semiconductor region as seen from the one main surface side and is selectively formed as far as a position of a contact end portion of a region of a coinciding portion with which the semiconductor region and metal electrode are in contact, a peripheral region wherein the central region extends as far as a position of an outer peripheral end of the semiconductor region, and an expanded end portion region wherein the peripheral region extends as far as an outer peripheral end of an innermost of the guard rings.
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