pBIST ENGINE WITH REDUCED SRAM TESTING BUS WIDTH

摘要

A programmable Built In Self Test (pBIST) system used to test embedded memories where the memories under test are incorporated in a plurality of sub chips not integrated with the pBIST module. Test data comparison is performed in a distributed data logging architecture to minimize the number of interconnections between the distributed data loggers and the pBIST.

主权项

1. An embedded memory test system comprising of:
a programmable Built In Self Test (pBIST) engine; a plurality of distributed data logging circuits communicating with the pBIST engine; a bus expander operable with each distributed data logger; and one or more memory block operable with each distributed data logger.