REORDERING BUFFER FOR MEMORY ACCESS LOCALITY

摘要

Systems and methods for scheduling instructions for execution on a multi-core processor reorder the execution of different threads to ensure that instructions specified as having localized memory access behavior are executed over one or more sequential clock cycles to benefit from memory access locality. At compile time, code sequences including memory access instructions that may be localized are delineated into separate batches. A scheduling unit ensures that multiple parallel threads are processed over one or more sequential scheduling cycles to execute the batched instructions. The scheduling unit waits to schedule execution of instructions that are not included in the particular batch until execution of the batched instructions is done so that memory access locality is maintained for the particular batch. In between the separate batches, instructions that are not included in a batch are scheduled so that threads executing non-batched instructions are also processed and not starved.

主权项

1. A method for scheduling instruction execution in a multi-threaded processor, the method comprising:
synchronizing a first thread group and a second thread group at a boundary delineating the start of a batch instruction sequence, wherein a first instruction and a second instruction in the batch instruction sequence are associated with localized memory access behavior; scheduling the batch instruction sequence for execution over sequential cycles within a multi-threaded processing core by the first thread group and the second thread group; and after scheduling the batch instruction sequence for execution by the first thread group and the second thread group, scheduling a third instruction for execution within the multi-threaded processing core by a third thread group, wherein the third instruction is not included in the batch instruction sequence.