发明名称 |
ASYMMETRICAL PROCESSING MULTI-CORE SYSTEM AND NETWORK DEVICE |
摘要 |
An asymmetrical processing multi-core system used in a network device is provided. A sub processing core within the asymmetrical processing multi-core system facilitates a main processing core of the asymmetrical processing multi-core system in processing tasks, thereby improving an overall performance of the entire network device and causing the network device to operate more facilely. Different from a conventional processing method, the asymmetrical processing multi-core system does not require moving or copying a large amount of processed packet data, and thus a large amount of memory bandwidth is saved and the power consumption is reduced. |
申请公布号 |
US2014164654(A1) |
申请公布日期 |
2014.06.12 |
申请号 |
US201313747487 |
申请日期 |
2013.01.23 |
申请人 |
GEMTEK TECHNOLOGY CO., LTD. |
发明人 |
Wu Pei-Lin |
分类号 |
G06F5/10 |
主分类号 |
G06F5/10 |
代理机构 |
|
代理人 |
|
主权项 |
1. An asymmetrical processing multi-core system comprising:
a main processing core having a first operation system, the first operation system comprising a first core space and a first user space, the first core space comprising an Ethernet driver module and a receiving end queue management module, the first user space comprising a first control management module; a sub processing core having a second operation system, the second operation system comprising a second core space and a second user space, the second user space comprising a second control management module; a register shared by the main processing core and the sub processing core; a memory having a first memory area utilizable by the main processing core; a first peripheral device connected to the main processing core and an external exchange member; and a second peripheral device connected to the sub processing core and the external exchange member; wherein the Ethernet driver module receives a packet from the external exchange member via the first peripheral device, and the packet is stored by the receiving end queue management module at the first memory area; wherein the second control management module directly read accesses the packet data stored by the first memory area according to a memory absolute position and further processes the packet data to generate a processing result, and then the second control management module notifies the processing result to the receiving end queue management module; and the receiving end queue management module processes the packet according to the processing result.
|
地址 |
Hsinchu TW |