发明名称 METHOD FOR MANUFACTURING DUMMY GATE IN GATE LAST PROCESS AND DUMMY GATE IN GATE LAST PROCESS
摘要 <p>Provided are a method for manufacturing a dummy gate in a gate last process and a dummy gate in a gate last process. The method comprises: providing a semiconductor substrate (20); growing a gate oxide layer (22) on the semiconductor substrate (20); depositing a bottom-layer amorphous silicon (24) on the gate oxide layer (22); depositing an ONO structure hard mask (26) on the bottom-layer amorphous silicon (24); depositing a top-layer amorphous silicon (28) on the ONO structure hard mask (26); depositing a hard mask layer (30) on the top-layer amorphous silicon (28); miniaturizing the hard mask layer (30), so that the width of the miniaturized hard mask layer (30) is smaller than and equal to 22 nm; and etching the top-layer amorphous silicon (28), the ONO structure hard mask (26) and the bottom-layer amorphous silicon (24) by using the miniaturized hard mask layer (30) as a standard, and removing the hard mask layer (30) and the top-layer amorphous silicon (28).</p>
申请公布号 WO2014086054(A1) 申请公布日期 2014.06.12
申请号 WO2012CN86401 申请日期 2012.12.12
申请人 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OFSCIENCES 发明人 LI, CHUNLONG;LI, JUNFENG;YAN, JIANG;ZHAO, CHAO
分类号 H01L21/336;H01L29/788 主分类号 H01L21/336
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