The disclosure includes a memory device comprises a first bitline, a second bitline, and a memory element disposed to be selectively and reversibly configured in one of two different resistive states. A first diode is connected between the first bitline and a first electrode of the memory element. A second diode is connected between the second bitline and the first electrode of the memory element. A wordline is connected to a second electrode of the memory element. The disclosure also includes a method of pogramming a memory cell and a cell reading method.