Interrupt event management

摘要

An interrupt management apparatus is provided for managing interrupt events generated by, for example, peripheral devices and computing modules. The interrupt management apparatus has an event decoder for receiving one or more interrupt signals from one or more interrupt sources and for decoding a received interrupt signal to produce control data relating to an interrupt event. The apparatus also has a sequence memory for storing one or more sequences, a sequence including one or more steps for handling one or more interrupt events, and one or more sequencers for interpreting one or more steps of a sequence stored in the sequence memory, the one or more sequencers being arranged to receive said control data from the event decoder. This enables the apparatus to manage said interrupt events without assistance from a central processing unit.

主权项

1. An interrupt management apparatus comprising:
an event decoder for receiving one or more interrupt signals from one or more interrupt sources and decoding a received interrupt signal to produce control data relating to an interrupt event; a sequence memory for storing one or more sequences, a sequence comprising one or more steps for handling one or more interrupt events; and one or more sequencers for receiving said control data from the event decoder, retrieving one or more steps of a sequence from the sequence memory based on the received control data, and interpreting the retrieved one or more steps.