发明名称 Method and system for implementing multiple high precision and low precision interpolators for a graphics pipeline
摘要 A rasterizer stage configured to implement multiple interpolators for graphics pipeline. The rasterizer stage includes a plurality of simultaneously operable low precision interpolators for computing a first set of pixel parameters for pixels of a geometric primitive and a plurality of simultaneously operable high precision interpolators for computing a second set of pixel parameters for pixels of the geometric primitive. The rasterizer stage also includes an output mechanism coupled to the interpolators for routing computed pixel parameters into a memory array. Parameters may be programmably assigned to the interpolators and the results thereof may be programmably assigned to portions of a pixel packet.
申请公布号 US8749576(B2) 申请公布日期 2014.06.10
申请号 US20060482669 申请日期 2006.07.06
申请人 Nvidia Corporation 发明人 Hutchins Edward A.;Angell Brian K.
分类号 G09G5/00 主分类号 G09G5/00
代理机构 代理人
主权项 1. A processor comprising: a plurality of low fixed precision interpolators for computing a first set of pixel parameters for a geometric primitive; a plurality of high precision interpolators for computing a second set of pixel parameters for said geometric primitive, wherein said plurality of low fixed precision interpolators operate simultaneously with said plurality of high precision interpolators and wherein said plurality of high precision interpolators operate at a first power consumption level and said plurality of low fixed precision interpolators operates at a second power consumption level, wherein said first power consumption level is greater than said second power consumption level; a programmable scheduler for scheduling parallel execution of high precision interpolation computations and low fixed precision interpolation computations on said plurality of high precision interpolators and said low fixed precision interpolators, wherein said scheduling is operable to be based on assigning low fixed precision interpolation computations to said low fixed precision interpolators; and an output mechanism coupled to said low fixed precision interpolators and said high precision interpolators for outputting said first set of pixel parameters and said second set of pixel parameters, wherein said low fixed precision interpolators and said high precision interpolators both utilize Barycentric coordinate values for interpolation.
地址 Santa Clara CA US