发明名称 |
Replacement metal gate transistors using bi-layer hardmask |
摘要 |
Methods of fabricating replacement metal gate transistors using bi-layer a hardmask are disclosed. By utilizing a bi-layer hardmask comprised of a first layer of nitride, followed by a second layer of oxide, the topography issues caused by transition regions of gates are mitigated, which simplifies downstream processing steps and improves yield. |
申请公布号 |
US8748252(B1) |
申请公布日期 |
2014.06.10 |
申请号 |
US201213684869 |
申请日期 |
2012.11.26 |
申请人 |
International Business Machines Corporation |
发明人 |
Leobandung Effendi;Cote William;Economikos Laertis;Kim Young-Hee;Park Dae-Gyu;Standaert Theodorus Eduardus;Stein Kenneth Jay;Suh YS;Yang Min |
分类号 |
H01L21/8234;H01L29/66 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
1. A method of fabricating a replacement metal gate transistor, comprising:
depositing a dummy gate,
wherein the dummy gate comprises
an N-type region,a P-type region, anda transition region; depositing a bi-layer
over the dummy gate,wherein the bi-layer comprises
a first sub-layer comprised of nitride, anda second sub-layer comprised of a first oxide layer; depositing a conformal nitride layer over the dummy gate; forming a first set of spacers
adjacent to the dummy gatein the N-type region; forming a second set of spacers
adjacent to the dummy gatein the P-type region; depositing a second oxide layer to cover the bi-layer, the first set of spacers, and the second set of spacers; planarizing the second oxide layer to leave a remaining portion with a height at the level of the top of the conformal nitride layer; and recessing the second oxide layer to the level of the first sub-layer of nitride.
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地址 |
Armonk NY US |